Wafer Fabrication

Hundreds of process steps (deposition, lithography, etch, implant, CMP, clean, with metrology throughout) build the circuits on the wafer; ~3 months per wafer. ONE node deliberately: every process step inside it is done in-house by the fab (TSMC, Samsung, Intel, SMIC, ...). Litho/etch/CMP are not split out — no distinct set of companies performs them as a service; the distinct industries are the suppliers feeding them (the fab-materials branches and the enabled-by equipment).